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authorrsc <rsc>2007-08-27 16:57:13 +0000
committerrsc <rsc>2007-08-27 16:57:13 +0000
commitb63bb0fd00cb34ed1d776e6836f5a2bb90de98c1 (patch)
treea4704782e39069059ba7fe8fd17741b27e2313dc /main.c
parent112873bc6501b4763205f3f5ca6a120888217c68 (diff)
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Clean up lapic code.
One initialization function now, not three. Use #defines instead of enums (consistent with other code, but sigh). Still boots in Bochs in SMP mode.
Diffstat (limited to 'main.c')
-rw-r--r--main.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/main.c b/main.c
index d467217..29a8d34 100644
--- a/main.c
+++ b/main.c
@@ -37,7 +37,6 @@ main0(void)
asm volatile("movl %0, %%ebp" : : "r" (cpus[bcpu].mpstack+MPSTACK));
lapic_init(bcpu);
-
cprintf("\ncpu%d: starting xv6\n\n", cpu());
pinit(); // process table
@@ -53,10 +52,7 @@ main0(void)
console_init(); // I/O devices & their interrupts
ide_init(); // disk
mp_startthem(); // other CPUs
- if(ismp){
- lapic_timerinit(); // smp timer
- lapic_enableintr(); // local interrupts
- }else
+ if(!ismp)
pit8253_timerinit(); // uniprocessor timer
userinit(); // first user process
@@ -74,8 +70,6 @@ mpmain(void)
cprintf("cpu%d: starting\n", cpu());
idtinit();
lapic_init(cpu());
- lapic_timerinit();
- lapic_enableintr();
setupsegs(0);
cpuid(0, 0, 0, 0, 0); // memory barrier