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authorRobert Morris <[email protected]>2019-06-05 11:42:03 -0400
committerRobert Morris <[email protected]>2019-06-05 11:42:03 -0400
commitf1a727b971a59bab6025b4c4111342c27356ca40 (patch)
treed22d52c613bfc003e6fb75b5d137aeff9d954201 /mp.h
parentec3d3a1fceee437c640f9c5c05fc517edfb1899e (diff)
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start at support for multiple CPUs
Diffstat (limited to 'mp.h')
-rw-r--r--mp.h56
1 files changed, 0 insertions, 56 deletions
diff --git a/mp.h b/mp.h
deleted file mode 100644
index 5964b63..0000000
--- a/mp.h
+++ /dev/null
@@ -1,56 +0,0 @@
-// See MultiProcessor Specification Version 1.[14]
-
-struct mp { // floating pointer
- uchar signature[4]; // "_MP_"
- uint32 physaddr; // phys addr of MP config table
- uchar length; // 1
- uchar specrev; // [14]
- uchar checksum; // all bytes must add up to 0
- uchar type; // MP system config type
- uchar imcrp;
- uchar reserved[3];
-};
-
-struct mpconf { // configuration table header
- uchar signature[4]; // "PCMP"
- ushort length; // total table length
- uchar version; // [14]
- uchar checksum; // all bytes must add up to 0
- uchar product[20]; // product id
- uint32 oemtable; // OEM table pointer
- ushort oemlength; // OEM table length
- ushort entry; // entry count
- uint32 lapicaddr_p; // address of local APIC
- ushort xlength; // extended table length
- uchar xchecksum; // extended table checksum
- uchar reserved;
-};
-
-struct mpproc { // processor table entry
- uchar type; // entry type (0)
- uchar apicid; // local APIC id
- uchar version; // local APIC verison
- uchar flags; // CPU flags
- #define MPBOOT 0x02 // This proc is the bootstrap processor.
- uchar signature[4]; // CPU signature
- uint feature; // feature flags from CPUID instruction
- uchar reserved[8];
-};
-
-struct mpioapic { // I/O APIC table entry
- uchar type; // entry type (2)
- uchar apicno; // I/O APIC id
- uchar version; // I/O APIC version
- uchar flags; // I/O APIC flags
- uint32 addr_p; // I/O APIC address
-};
-
-// Table entry types
-#define MPPROC 0x00 // One per processor
-#define MPBUS 0x01 // One per bus
-#define MPIOAPIC 0x02 // One per I/O APIC
-#define MPIOINTR 0x03 // One per bus interrupt source
-#define MPLINTR 0x04 // One per system interrupt source
-
-//PAGEBREAK!
-// Blank page.