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| author | Robert Morris <rtm@csail.mit.edu> | 2019-06-05 14:05:46 -0400 |
|---|---|---|
| committer | Robert Morris <rtm@csail.mit.edu> | 2019-06-05 14:05:46 -0400 |
| commit | 31136437684b5987ef46f4c6947940cf96de75b3 (patch) | |
| tree | 3c89b1f0e12bbddbf307259326ecb5f763ba6e09 /start.c | |
| parent | f1a727b971a59bab6025b4c4111342c27356ca40 (diff) | |
| download | xv6-labs-31136437684b5987ef46f4c6947940cf96de75b3.tar.gz xv6-labs-31136437684b5987ef46f4c6947940cf96de75b3.tar.bz2 xv6-labs-31136437684b5987ef46f4c6947940cf96de75b3.zip | |
spinlocks using gcc intrinsics
push_off() / pop_off()
set up per-hart plic stuff so all harts get device interrupts
Diffstat (limited to 'start.c')
| -rw-r--r-- | start.c | 14 |
1 files changed, 8 insertions, 6 deletions
@@ -9,12 +9,12 @@ void main(); // entry.S needs one stack per CPU. __attribute__ ((aligned (16))) char stack0[4096 * NCPU]; -// assembly code in kernelvec for machine-mode timer interrupt. -extern void machinevec(); - // scratch area for timer interrupt, one per CPU. uint64 mscratch0[NCPU * 32]; +// assembly code in kernelvec for machine-mode timer interrupt. +extern void machinevec(); + // entry.S jumps here in machine mode on stack0. void mstart() @@ -48,7 +48,9 @@ mstart() w_mstatus(r_mstatus() | MSTATUS_MIE); w_mie(r_mie() | MIE_MTIE); - // call main(hartid) in supervisor mode. - asm("csrr a0, mhartid ; \ - mret"); + // keep each CPU's hartid in its tp register, for cpuid(). + w_tp(id); + + // call main() in supervisor mode. + asm("mret"); } |