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author | rsc <rsc> | 2007-08-28 04:40:58 +0000 |
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committer | rsc <rsc> | 2007-08-28 04:40:58 +0000 |
commit | 9e82bfb04cc5644f32823fa9ec406261f05073b8 (patch) | |
tree | c1329bb47af7959a7ea3b483429529567f13f813 /timer.c | |
parent | eae04163a758cf1fa8cc47c8668e1e769f289bc6 (diff) | |
download | xv6-labs-9e82bfb04cc5644f32823fa9ec406261f05073b8.tar.gz xv6-labs-9e82bfb04cc5644f32823fa9ec406261f05073b8.tar.bz2 xv6-labs-9e82bfb04cc5644f32823fa9ec406261f05073b8.zip |
rename 8253pit.c to timer.c
Diffstat (limited to 'timer.c')
-rw-r--r-- | timer.c | 32 |
1 files changed, 32 insertions, 0 deletions
@@ -0,0 +1,32 @@ +// Intel 8253/8254/82C54 Programmable Interval Timer (PIT). +// Only used on uniprocessors; +// SMP machines use the local APIC timer. + +#include "types.h" +#include "defs.h" +#include "traps.h" +#include "x86.h" + +#define IO_TIMER1 0x040 // 8253 Timer #1 + +// Frequency of all three count-down timers; +// (TIMER_FREQ/freq) is the appropriate count +// to generate a frequency of freq Hz. + +#define TIMER_FREQ 1193182 +#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x)) + +#define TIMER_MODE (IO_TIMER1 + 3) // timer mode port +#define TIMER_SEL0 0x00 // select counter 0 +#define TIMER_RATEGEN 0x04 // mode 2, rate generator +#define TIMER_16BIT 0x30 // r/w counter 16 bits, LSB first + +void +timer_init(void) +{ + // Interrupt 100 times/sec. + outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); + outb(IO_TIMER1, TIMER_DIV(100) % 256); + outb(IO_TIMER1, TIMER_DIV(100) / 256); + irq_enable(IRQ_TIMER); +} |