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2007-09-27use larger, allocated cpu stacksrsc2-23/+16
2007-09-27don't call it ss - that's the stack segmentrsc1-2/+2
2007-09-27kernel SMP interruptibility fixes.rsc10-33/+107
Last year, right before I sent xv6 to the printer, I changed the SETGATE calls so that interrupts would be disabled on entry to interrupt handlers, and I added the nlock++ / nlock-- in trap() so that interrupts would stay disabled while the hw handlers (but not the syscall handler) did their work. I did this because the kernel was otherwise causing Bochs to triple-fault in SMP mode, and time was short. Robert observed yesterday that something was keeping the SMP preemption user test from working. It turned out that when I simplified the lapic code I swapped the order of two register writes that I didn't realize were order dependent. I fixed that and then since I had everything paged in kept going and tried to figure out why you can't leave interrupts on during interrupt handlers. There are a few issues. First, there must be some way to keep interrupts from "stacking up" and overflowing the stack. Keeping interrupts off the whole time solves this problem -- even if the clock tick handler runs long enough that the next clock tick is waiting when it finishes, keeping interrupts off means that the handler runs all the way through the "iret" before the next handler begins. This is not really a problem unless you are putting too many prints in trap -- if the OS is doing its job right, the handlers should run quickly and not stack up. Second, if xv6 had page faults, then it would be important to keep interrupts disabled between the start of the interrupt and the time that cr2 was read, to avoid a scenario like: p1 page faults [cr2 set to faulting address] p1 starts executing trapasm.S clock interrupt, p1 preempted, p2 starts executing p2 page faults [cr2 set to another faulting address] p2 starts, finishes fault handler p1 rescheduled, reads cr2, sees wrong fault address Alternately p1 could be rescheduled on the other cpu, in which case it would still see the wrong cr2. That said, I think cr2 is the only interrupt state that isn't pushed onto the interrupt stack atomically at fault time, and xv6 doesn't care. (This isn't entirely hypothetical -- I debugged this problem on Plan 9.) Third, and this is the big one, it is not safe to call cpu() unless interrupts are disabled. If interrupts are enabled then there is no guarantee that, between the time cpu() looks up the cpu id and the time that it the result gets used, the process has not been rescheduled to the other cpu. For example, the very commonly-used expression curproc[cpu()] (aka the macro cp) can end up referring to the wrong proc: the code stores the result of cpu() in %eax, gets rescheduled to the other cpu at just the wrong instant, and then reads curproc[%eax]. We use curproc[cpu()] to get the current process a LOT. In that particular case, if we arranged for the current curproc entry to be addressed by %fs:0 and just use a different %fs on each CPU, then we could safely get at curproc even with interrupts disabled, since the read of %fs would be atomic with the read of %fs:0. Alternately, we could have a curproc() function that disables interrupts while computing curproc[cpu()]. I've done that last one. Even in the current kernel, with interrupts off on entry to trap, interrupts are enabled inside release if there are no locks held. Also, the scheduler's idle loop must be interruptible at times so that the clock and disk interrupts (which might make processes runnable) can be handled. In addition to the rampant use of curproc[cpu()], this little snippet from acquire is wrong on smp: if(cpus[cpu()].nlock == 0) cli(); cpus[cpu()].nlock++; because if interrupts are off then we might call cpu(), get rescheduled to a different cpu, look at cpus[oldcpu].nlock, and wrongly decide not to disable interrupts on the new cpu. The fix is to always call cli(). But this is wrong too: if(holding(lock)) panic("acquire"); cli(); cpus[cpu()].nlock++; because holding looks at cpu(). The fix is: cli(); if(holding(lock)) panic("acquire"); cpus[cpu()].nlock++; I've done that, and I changed cpu() to complain the first time it gets called with interrupts disabled. (It gets called too much to complain every time.) I added new functions splhi and spllo that are like acquire and release but without the locking: void splhi(void) { cli(); cpus[cpu()].nsplhi++; } void spllo(void) { if(--cpus[cpu()].nsplhi == 0) sti(); } and I've used those to protect other sections of code that refer to cpu() when interrupts would otherwise be disabled (basically just curproc and setupsegs). I also use them in acquire/release and got rid of nlock. I'm not thrilled with the names, but I think the concept -- a counted cli/sti -- is sound. Having them also replaces the nlock++/nlock-- in trap.c and main.c, which is nice. Final note: it's still not safe to enable interrupts in the middle of trap() between lapic_eoi and returning to user space. I don't understand why, but we get a fault on pop %es because 0x10 is a bad segment descriptor (!) and then the fault faults trying to go into a new interrupt because 0x8 is a bad segment descriptor too! Triple fault. I haven't debugged this yet.
2007-09-27use console lockrsc1-1/+1
2007-09-27make slow bigdir last testrsc1-3/+1
2007-09-27changes since two days ago:rsc1-2/+1
drop , address=0xf0000 from romimage line. newer bochs has a 128k bios that it loads elsewhere. so let bochs decide where the romimage goes. change cpu quantum to 1 (default is 5, max is 16) in an attempt to provoke more races. only provokes them slightly more frequently, may not be worth the slowdown.
2007-09-27use standard bios locationrsc1-2/+1
2007-09-27believe it or not, this was workingrsc3-10/+14
the macro expansion of "char *cp;" turned into char *(curproc[cpu()]); which declares a dynamically sized array of char* called curproc. so then &cp == &(curproc[cpu()]) was actually a stack variable as "expected". it was one past the end of the array, but the implicit alloca allocated more than was necessary. do not tell me that making cp a #define was a bad idea. there are worse problems to fix. more on that later.
2007-09-26comment bochs nonsensersc1-0/+2
2007-09-26various comment and print tweaksrsc1-6/+7
2007-09-26debugging printsrsc1-0/+3
2007-09-26Apparently the initial interrupt count lapic[TICR]rsc2-10/+3
must be set *after* initializing the lapic[TIMER] vector. Doing this, we now get clock interrupts on cpu 1. (No idea why we always got them on cpu 0.) Don't write to TCCR - it is read-only.
2007-09-25oops, interrupts on in syscall traps doesn't work after allrtm1-1/+1
2007-09-25tell SETGATE to leave interrupts on for T_SYSCALLrtm1-2/+2
panic if unknown fault with CPL=0 (i.e. in kernel)
2007-09-19This should fix building on FreeBSDnelhage1-1/+2
2007-09-18Fix compilation on 64-bit machines (thanks to andersk for patch)nelhage1-12/+14
2007-09-15fix commentsrtm3-10/+8
2007-09-05shrsc1-0/+5
2007-08-31continuous quality managementrtm3-6/+6
2007-08-30symlink implementationrsc1-0/+151
2007-08-30do not toss .psrsc1-1/+1
2007-08-30clumsy cdrsc1-0/+8
2007-08-30make new Homework 8 workrtm2-2/+1
2007-08-30oops - broke circular bufferrsc1-4/+2
2007-08-30oops - broke arg countingrsc1-1/+1
2007-08-30longjmp -> swtch in commentsrtm1-4/+4
2007-08-30tweakrsc2-3/+16
2007-08-30DO NOT MAIL: xv6-rev1rsc1-0/+0
2007-08-30final xv6 for 2007rsc2-17800/+20342
2007-08-29bootothers now in mainrsc1-3/+3
2007-08-29spellingrtm1-4/+3
2007-08-28final nitsrsc2-13/+6
2007-08-28match READMErsc1-2/+2
2007-08-28nitsrsc1-4/+4
2007-08-28nitsrsc5-29/+17
2007-08-28delete proc_ on proc_exit, proc_wait, proc_killrsc4-12/+12
2007-08-28comments; rename irq_ to pic_rsc9-18/+25
2007-08-28spaces around else for rtmrsc12-24/+23
2007-08-28more consistent spacingrsc17-59/+59
2007-08-28nitsrsc9-61/+24
2007-08-28fix offsetsrsc1-2/+2
2007-08-28more cmain -> bootmainrsc2-2/+2
2007-08-28Change dev read/write functionsrsc3-7/+12
to take inode* instead of minor number. Unlock console inode during console_read and console_write. Otherwise background processes cannot write to console while the shell is reading it waiting for input.
2007-08-28oopsrsc1-2/+2
2007-08-28cmain -> bootmainrsc2-3/+3
2007-08-28nitrsc1-3/+1
2007-08-28replace setjmp/longjmp with swtchrsc7-86/+55
2007-08-28never returns!rsc1-1/+1
2007-08-28nitsrsc2-3/+1
2007-08-28formattingrsc2-1/+3