diff options
author | rsc <rsc> | 2007-08-28 04:40:58 +0000 |
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committer | rsc <rsc> | 2007-08-28 04:40:58 +0000 |
commit | 9e82bfb04cc5644f32823fa9ec406261f05073b8 (patch) | |
tree | c1329bb47af7959a7ea3b483429529567f13f813 | |
parent | eae04163a758cf1fa8cc47c8668e1e769f289bc6 (diff) | |
download | xv6-labs-9e82bfb04cc5644f32823fa9ec406261f05073b8.tar.gz xv6-labs-9e82bfb04cc5644f32823fa9ec406261f05073b8.tar.bz2 xv6-labs-9e82bfb04cc5644f32823fa9ec406261f05073b8.zip |
rename 8253pit.c to timer.c
-rw-r--r-- | 8253pit.c | 45 | ||||
-rw-r--r-- | defs.h | 6 | ||||
-rw-r--r-- | main.c | 4 | ||||
-rw-r--r-- | runoff.list | 2 | ||||
-rw-r--r-- | timer.c | 32 |
5 files changed, 38 insertions, 51 deletions
diff --git a/8253pit.c b/8253pit.c deleted file mode 100644 index 1d98dc1..0000000 --- a/8253pit.c +++ /dev/null @@ -1,45 +0,0 @@ -#include "types.h" -#include "defs.h" -#include "traps.h" -#include "x86.h" - -// Register definitions for the Intel -// 8253/8254/82C54 Programmable Interval Timer (PIT). - -#define IO_TIMER1 0x040 // 8253 Timer #1 -#define IO_TIMER2 0x048 // 8253 Timer #2 (EISA only) - -// Frequency of all three count-down timers; (TIMER_FREQ/freq) is the -// appropriate count to generate a frequency of freq hz. - -#define TIMER_FREQ 1193182 -#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x)) - -#define TIMER_CNTR0 (IO_TIMER1 + 0) // timer 0 counter port -#define TIMER_CNTR1 (IO_TIMER1 + 1) // timer 1 counter port -#define TIMER_CNTR2 (IO_TIMER1 + 2) // timer 2 counter port -#define TIMER_MODE (IO_TIMER1 + 3) // timer mode port -#define TIMER_SEL0 0x00 // select counter 0 -#define TIMER_SEL1 0x40 // select counter 1 -#define TIMER_SEL2 0x80 // select counter 2 -#define TIMER_INTTC 0x00 // mode 0, intr on terminal cnt -#define TIMER_ONESHOT 0x02 // mode 1, one shot -#define TIMER_RATEGEN 0x04 // mode 2, rate generator -#define TIMER_SQWAVE 0x06 // mode 3, square wave -#define TIMER_SWSTROBE 0x08 // mode 4, s/w triggered strobe -#define TIMER_HWSTROBE 0x0a // mode 5, h/w triggered strobe -#define TIMER_LATCH 0x00 // latch counter for reading -#define TIMER_LSB 0x10 // r/w counter LSB -#define TIMER_MSB 0x20 // r/w counter MSB -#define TIMER_16BIT 0x30 // r/w counter 16 bits, LSB first -#define TIMER_BCD 0x01 // count in BCD - -void -pit8253_timerinit(void) -{ - // initialize 8253 clock to interrupt 100 times/sec - outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); - outb(IO_TIMER1, TIMER_DIV(100) % 256); - outb(IO_TIMER1, TIMER_DIV(100) / 256); - irq_enable(IRQ_TIMER); -} @@ -7,9 +7,6 @@ struct proc; struct spinlock; struct stat; -// 8253pit.c -void pit8253_timerinit(void); - // bio.c void binit(void); struct buf* bread(uint, uint); @@ -140,6 +137,9 @@ int fetchint(struct proc*, uint, int*); int fetchstr(struct proc*, uint, char**); void syscall(void); +// timer.c +void timer_init(void); + // trap.c void idtinit(void); extern int ticks; @@ -46,7 +46,7 @@ main(void) ide_init(); // disk bootothers(); // boot other CPUs if(!ismp) - pit8253_timerinit(); // uniprocessor timer + timer_init(); // uniprocessor timer userinit(); // first user process // enable interrupts on this processor. @@ -74,7 +74,7 @@ mpmain(void) scheduler(); } -void +static void bootothers(void) { extern uchar _binary_bootother_start[], _binary_bootother_size[]; diff --git a/runoff.list b/runoff.list index 9064544..7a2a390 100644 --- a/runoff.list +++ b/runoff.list @@ -64,7 +64,7 @@ picirq.c kbd.h kbd.c console.c -8253pit.c +timer.c # user-level usys.S @@ -0,0 +1,32 @@ +// Intel 8253/8254/82C54 Programmable Interval Timer (PIT). +// Only used on uniprocessors; +// SMP machines use the local APIC timer. + +#include "types.h" +#include "defs.h" +#include "traps.h" +#include "x86.h" + +#define IO_TIMER1 0x040 // 8253 Timer #1 + +// Frequency of all three count-down timers; +// (TIMER_FREQ/freq) is the appropriate count +// to generate a frequency of freq Hz. + +#define TIMER_FREQ 1193182 +#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x)) + +#define TIMER_MODE (IO_TIMER1 + 3) // timer mode port +#define TIMER_SEL0 0x00 // select counter 0 +#define TIMER_RATEGEN 0x04 // mode 2, rate generator +#define TIMER_16BIT 0x30 // r/w counter 16 bits, LSB first + +void +timer_init(void) +{ + // Interrupt 100 times/sec. + outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); + outb(IO_TIMER1, TIMER_DIV(100) % 256); + outb(IO_TIMER1, TIMER_DIV(100) / 256); + irq_enable(IRQ_TIMER); +} |