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author | rsc <rsc> | 2006-09-06 19:08:14 +0000 |
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committer | rsc <rsc> | 2006-09-06 19:08:14 +0000 |
commit | 0cfc7290e8307b66ade6d5eb736c89cc4062c302 (patch) | |
tree | 592ad149f605717dfa0162d75da0af050a9c53e4 /bootother.S | |
parent | db8fb62e4d599f4e08a3b6420e42b2445e8d7fe3 (diff) | |
download | xv6-labs-0cfc7290e8307b66ade6d5eb736c89cc4062c302.tar.gz xv6-labs-0cfc7290e8307b66ade6d5eb736c89cc4062c302.tar.bz2 xv6-labs-0cfc7290e8307b66ade6d5eb736c89cc4062c302.zip |
wrap long lines
Diffstat (limited to 'bootother.S')
-rw-r--r-- | bootother.S | 80 |
1 files changed, 39 insertions, 41 deletions
diff --git a/bootother.S b/bootother.S index c5ab0bf..f5bd856 100644 --- a/bootother.S +++ b/bootother.S @@ -1,20 +1,17 @@ #include "asm.h" -/* - * Start an Application Processor. This must be placed on a 4KB boundary - * somewhere in the 1st MB of conventional memory (APBOOTSTRAP). However, - * due to some shortcuts below it's restricted further to within the 1st - * 64KB. The AP starts in real-mode, with - * CS selector set to the startup memory address/16; - * CS base set to startup memory address; - * CS limit set to 64KB; - * CPL and IP set to 0. - * - * mp.c causes each non-boot CPU in turn to jump to start. - * mp.c puts the correct %esp in start-4, and the place to jump - * to in start-8. - * - */ +# Start an Application Processor. This must be placed on a 4KB boundary +# somewhere in the 1st MB of conventional memory (APBOOTSTRAP). However, +# due to some shortcuts below it's restricted further to within the 1st +# 64KB. The AP starts in real-mode, with +# CS selector set to the startup memory address/16; +# CS base set to startup memory address; +# CS limit set to 64KB; +# CPL and IP set to 0. +# +# mp.c causes each non-boot CPU in turn to jump to start. +# mp.c puts the correct %esp in start-4, and the place to jump +# to in start-8. .set PROT_MODE_CSEG,0x8 # code segment selector .set PROT_MODE_DSEG,0x10 # data segment selector @@ -22,39 +19,40 @@ .globl start start: - .code16 # This runs in real mode - cli # Disable interrupts - cld # String operations increment + .code16 # This runs in real mode + cli # Disable interrupts + cld # String operations increment # Set up the important data segment registers (DS, ES, SS). - xorw %ax,%ax # Segment number zero - movw %ax,%ds # -> Data Segment - movw %ax,%es # -> Extra Segment - movw %ax,%ss # -> Stack Segment + xorw %ax,%ax # Segment number zero + movw %ax,%ds # -> Data Segment + movw %ax,%es # -> Extra Segment + movw %ax,%ss # -> Stack Segment # Set up the stack pointer, growing downward from 0x7000-8. - movw $start-8,%sp # Stack Pointer + movw $start-8,%sp # Stack Pointer -#### Switch from real to protected mode -#### The descriptors in our GDT allow all physical memory to be accessed. -#### Furthermore, the descriptors have base addresses of 0, so that the -#### segment translation is a NOP, ie. virtual addresses are identical to -#### their physical addresses. With this setup, immediately after -#### enabling protected mode it will still appear to this code -#### that it is running directly on physical memory with no translation. -#### This initial NOP-translation setup is required by the processor -#### to ensure that the transition to protected mode occurs smoothly. + # Switch from real to protected mode + # The descriptors in our GDT allow all physical memory to be accessed. + # Furthermore, the descriptors have base addresses of 0, so that the + # segment translation is a NOP, ie. virtual addresses are identical to + # their physical addresses. With this setup, immediately after + # enabling protected mode it will still appear to this code + # that it is running directly on physical memory with no translation. + # This initial NOP-translation setup is required by the processor + # to ensure that the transition to protected mode occurs smoothly. - lgdt gdtdesc # load GDT -- mandatory in protected mode - movl %cr0, %eax # turn on protected mode - orl $CR0_PE_ON, %eax # - movl %eax, %cr0 # - ### CPU magic: jump to relocation, flush prefetch queue, and reload %cs - ### Has the effect of just jmp to the next instruction, but simultaneous - ### loads CS with $PROT_MODE_CSEG. + lgdt gdtdesc # load GDT -- mandatory in protected mode + movl %cr0, %eax # turn on protected mode + orl $CR0_PE_ON, %eax # + movl %eax, %cr0 # + + # CPU magic: jump to relocation, flush prefetch queue, and reload %cs + # Has the effect of just jmp to the next instruction, but simultaneous + # loads CS with $PROT_MODE_CSEG. ljmp $PROT_MODE_CSEG, $protcseg -#### we are in 32-bit protected mode (hence the .code32) +# We are now in 32-bit protected mode (hence the .code32) .code32 protcseg: # Set up the protected-mode data segment registers @@ -69,7 +67,7 @@ protcseg: movl start-4, %esp jmp *%eax -.p2align 2 # force 4 byte alignment +.p2align 2 # force 4 byte alignment gdt: SEG_NULLASM # null seg SEG_ASM(STA_X|STA_R, 0x0, 0xffffffff) # code seg |