Apparently the initial interrupt count lapic[TICR]

must be set *after* initializing the lapic[TIMER] vector.

Doing this, we now get clock interrupts on cpu 1.
(No idea why we always got them on cpu 0.)

Don't write to TCCR - it is read-only.

1 files changed, 0 insertions, 4 deletions

diff --git a/defs.h b/defs.h
index 7540e1e..b9e0e98 100644
--- a/defs.h
+++ b/defs.h
@@ -70,13 +70,9 @@ void            kbd_intr(void);
 // lapic.c
 int             cpu(void);
 extern volatile uint*    lapic;
-void            lapic_disableintr(void);
-void            lapic_enableintr(void);
 void            lapic_eoi(void);
 void            lapic_init(int);
 void            lapic_startap(uchar, uint);
-void            lapic_timerinit(void);
-void            lapic_timerintr(void);
 
 // mp.c
 extern int      ismp;