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| author | Robert Morris <[email protected]> | 2019-07-25 05:35:03 -0400 |
|---|---|---|
| committer | Robert Morris <[email protected]> | 2019-07-25 05:35:03 -0400 |
| commit | 5d5e4e065f4e593c9e396a52b8e599cdc62c9e7d (patch) | |
| tree | 0eaa24e2b0f489a65eae959c5f3b7b419a9ea214 /kernel/kernelvec.S | |
| parent | aef3e0f5a41c3b45eeb47e407cacb6cfa59168a0 (diff) | |
| download | xv6-labs-5d5e4e065f4e593c9e396a52b8e599cdc62c9e7d.tar.gz xv6-labs-5d5e4e065f4e593c9e396a52b8e599cdc62c9e7d.tar.bz2 xv6-labs-5d5e4e065f4e593c9e396a52b8e599cdc62c9e7d.zip | |
comments for timer setup
Diffstat (limited to 'kernel/kernelvec.S')
| -rw-r--r-- | kernel/kernelvec.S | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/kernel/kernelvec.S b/kernel/kernelvec.S index 0efde8b..9aabe96 100644 --- a/kernel/kernelvec.S +++ b/kernel/kernelvec.S @@ -86,6 +86,11 @@ kernelvec: .globl machinevec .align 4 machinevec: + # start.c has set up the memory that mscratch points to: + # scratch[0,8,16] : register save area. + # scratch[32] : address of CLINT's MTIMECMP register. + # scratch[40] : desired interval between interrupts. + csrrw a0, mscratch, a0 sd a1, 0(a0) sd a2, 8(a0) |