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authorMole Shang <[email protected]>2024-02-19 14:10:32 +0800
committerMole Shang <[email protected]>2024-02-19 14:36:21 +0800
commitd86118fc80267649b4791c8c0c72ebd60edf1ef2 (patch)
treeb792b617b4df80a5803a9c1164d0e3fdfe9cfe31 /kernel/plic.c
parentb20ef9d0210fd7d9403acde1857eed1b9880c0b2 (diff)
parent0cf897cbe05fd8485162619db4244f4159d0eb52 (diff)
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Merge branch 'fs' into mmap
Conflicts: .gitignore Makefile conf/lab.mk kernel/defs.h user/user.h
Diffstat (limited to 'kernel/plic.c')
-rw-r--r--kernel/plic.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/kernel/plic.c b/kernel/plic.c
index 4175db9..5c9d96a 100644
--- a/kernel/plic.c
+++ b/kernel/plic.c
@@ -14,6 +14,13 @@ plicinit(void)
// set desired IRQ priorities non-zero (otherwise disabled).
*(uint32*)(PLIC + UART0_IRQ*4) = 1;
*(uint32*)(PLIC + VIRTIO0_IRQ*4) = 1;
+
+#ifdef LAB_NET
+ // PCIE IRQs are 32 to 35
+ for(int irq = 1; irq < 0x35; irq++){
+ *(uint32*)(PLIC + irq*4) = 1;
+ }
+#endif
}
void
@@ -25,6 +32,11 @@ plicinithart(void)
// for the uart and virtio disk.
*(uint32*)PLIC_SENABLE(hart) = (1 << UART0_IRQ) | (1 << VIRTIO0_IRQ);
+#ifdef LAB_NET
+ // hack to get at next 32 IRQs for e1000
+ *(uint32*)(PLIC_SENABLE(hart)+4) = 0xffffffff;
+#endif
+
// set this hart's S-mode priority threshold to 0.
*(uint32*)PLIC_SPRIORITY(hart) = 0;
}