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| author | Robert Morris <[email protected]> | 2022-08-09 15:11:25 -0400 |
|---|---|---|
| committer | Robert Morris <[email protected]> | 2022-08-09 15:11:25 -0400 |
| commit | 7d8bfdcbe306f7f407a816a4f032cf1780d8c215 (patch) | |
| tree | ba74c9376ee2537acb3d328a9df4ab94f04617a7 /kernel/plic.c | |
| parent | dd431c400a78e3bd79cd1a51e117fc8f4d91d948 (diff) | |
| download | xv6-labs-7d8bfdcbe306f7f407a816a4f032cf1780d8c215.tar.gz xv6-labs-7d8bfdcbe306f7f407a816a4f032cf1780d8c215.tar.bz2 xv6-labs-7d8bfdcbe306f7f407a816a4f032cf1780d8c215.zip | |
nothing much
Diffstat (limited to 'kernel/plic.c')
| -rw-r--r-- | kernel/plic.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/kernel/plic.c b/kernel/plic.c index 5acba39..d4fd122 100644 --- a/kernel/plic.c +++ b/kernel/plic.c @@ -21,7 +21,8 @@ plicinithart(void) { int hart = cpuid(); - // set uart's enable bit for this hart's S-mode. + // set enable bits for this hart's S-mode + // for the uart and virtio disk. *(uint32*)PLIC_SENABLE(hart)= (1 << UART0_IRQ) | (1 << VIRTIO0_IRQ); // set this hart's S-mode priority threshold to 0. |