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author | Robert Morris <[email protected]> | 2019-07-16 17:02:21 -0400 |
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committer | Robert Morris <[email protected]> | 2019-07-16 17:02:21 -0400 |
commit | ebc39372096280a4a5957d3e3836c859e5d78a79 (patch) | |
tree | 8df08ba410ac0f829b120f76e896bfe3658ddb96 /kernel/riscv.h | |
parent | 6bbc2b2245c5b006824eb42ef33d5b296158a693 (diff) | |
download | xv6-labs-ebc39372096280a4a5957d3e3836c859e5d78a79.tar.gz xv6-labs-ebc39372096280a4a5957d3e3836c859e5d78a79.tar.bz2 xv6-labs-ebc39372096280a4a5957d3e3836c859e5d78a79.zip |
conservatively call sfence.vma before every satp load.
Diffstat (limited to 'kernel/riscv.h')
-rw-r--r-- | kernel/riscv.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/kernel/riscv.h b/kernel/riscv.h index e5c0f64..e35f3bc 100644 --- a/kernel/riscv.h +++ b/kernel/riscv.h @@ -312,6 +312,17 @@ r_ra() return x; } +// tell the machine to finish any previous writes to +// PTEs, so that a subsequent use of a virtual +// address or load of the SATP will see those writes. +// perhaps this also flushes the TLB. +static inline void +sfence_vma() +{ + // the zero, zero means flush all TLB entries. + asm volatile("sfence.vma zero, zero"); +} + #define PGSIZE 4096 // bytes per page #define PGSHIFT 12 // bits of offset within a page |