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| author | Mole Shang <[email protected]> | 2024-02-11 17:51:28 +0800 |
|---|---|---|
| committer | Mole Shang <[email protected]> | 2024-02-11 17:51:28 +0800 |
| commit | 4a6593f1a6f666c618d303a4858c4c6d31b41c63 (patch) | |
| tree | 29d5302aec4e0f3c34a70baa9fb83c0bb35dbf7c /kernel/riscv.h | |
| parent | 2fe04bc8faa4bf737a86c36a8017473e84814f3b (diff) | |
| download | xv6-labs-4a6593f1a6f666c618d303a4858c4c6d31b41c63.tar.gz xv6-labs-4a6593f1a6f666c618d303a4858c4c6d31b41c63.tar.bz2 xv6-labs-4a6593f1a6f666c618d303a4858c4c6d31b41c63.zip | |
lab cow: finishcow
Diffstat (limited to 'kernel/riscv.h')
| -rw-r--r-- | kernel/riscv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/kernel/riscv.h b/kernel/riscv.h index 5ede50a..7d6eb6e 100644 --- a/kernel/riscv.h +++ b/kernel/riscv.h @@ -353,6 +353,7 @@ typedef uint64 *pagetable_t; // 512 PTEs #define PTE_X (1L << 3) #define PTE_U (1L << 4) // user can access #define PTE_A (1L << 6) // riscv access bit +#define PTE_C (1L << 8) // RSW low bit, use it to mark whether a page is COW // shift a physical address to the right place for a PTE. #define PA2PTE(pa) ((((uint64)pa) >> 12) << 10) |