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| author | Frans Kaashoek <[email protected]> | 2019-07-29 11:44:55 -0400 |
|---|---|---|
| committer | Frans Kaashoek <[email protected]> | 2019-07-29 11:44:55 -0400 |
| commit | 005773c0c3cf3119273d1fd001c01241f7eae5c2 (patch) | |
| tree | 60605ba7f84b8556edd969135b5962f482cbea81 /kernel/uart.c | |
| parent | 33494edad5970586ed61efc967405b07db529b72 (diff) | |
| parent | 47b9cfee4991a74bb999b795e57d9c86b7f45c50 (diff) | |
| download | xv6-labs-005773c0c3cf3119273d1fd001c01241f7eae5c2.tar.gz xv6-labs-005773c0c3cf3119273d1fd001c01241f7eae5c2.tar.bz2 xv6-labs-005773c0c3cf3119273d1fd001c01241f7eae5c2.zip | |
Merge branch 'riscv' of g.csail.mit.edu:xv6-dev into riscv
Diffstat (limited to 'kernel/uart.c')
| -rw-r--r-- | kernel/uart.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/kernel/uart.c b/kernel/uart.c index 852a085..3a5cdc4 100644 --- a/kernel/uart.c +++ b/kernel/uart.c @@ -15,8 +15,9 @@ // address of one of the registers. #define Reg(reg) ((volatile unsigned char *)(UART0 + reg)) -// the registers. some have different meanings for -// read and write. +// the UART control registers. +// some have different meanings for +// read vs write. // http://byterunner.com/16550.html #define RHR 0 // receive holding register (for input bytes) #define THR 0 // transmit holding register (for output bytes) |