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| author | Robert Morris <[email protected]> | 2020-10-05 15:28:01 -0400 |
|---|---|---|
| committer | Frans Kaashoek <[email protected]> | 2020-10-05 19:30:27 -0400 |
| commit | bebecfd6fd449fb86f73b81982f8c90e5b6bbf90 (patch) | |
| tree | e609ecbda6a195fae34e9150ac59f592947c408b /kernel | |
| parent | c199afe4c8d77c8da24e1fda479391c9ffa76239 (diff) | |
| download | xv6-labs-bebecfd6fd449fb86f73b81982f8c90e5b6bbf90.tar.gz xv6-labs-bebecfd6fd449fb86f73b81982f8c90e5b6bbf90.tar.bz2 xv6-labs-bebecfd6fd449fb86f73b81982f8c90e5b6bbf90.zip | |
more explicable scratch area size for machine-mode timer interrupts
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/kernelvec.S | 8 | ||||
| -rw-r--r-- | kernel/start.c | 16 |
2 files changed, 12 insertions, 12 deletions
diff --git a/kernel/kernelvec.S b/kernel/kernelvec.S index 3e9d3e9..f42a364 100644 --- a/kernel/kernelvec.S +++ b/kernel/kernelvec.S @@ -93,8 +93,8 @@ kernelvec: timervec: # start.c has set up the memory that mscratch points to: # scratch[0,8,16] : register save area. - # scratch[32] : address of CLINT's MTIMECMP register. - # scratch[40] : desired interval between interrupts. + # scratch[24] : address of CLINT's MTIMECMP register. + # scratch[32] : desired interval between interrupts. csrrw a0, mscratch, a0 sd a1, 0(a0) @@ -103,8 +103,8 @@ timervec: # schedule the next timer interrupt # by adding interval to mtimecmp. - ld a1, 32(a0) # CLINT_MTIMECMP(hart) - ld a2, 40(a0) # interval + ld a1, 24(a0) # CLINT_MTIMECMP(hart) + ld a2, 32(a0) # interval ld a3, 0(a1) add a3, a3, a2 sd a3, 0(a1) diff --git a/kernel/start.c b/kernel/start.c index 4eb6c2d..1876680 100644 --- a/kernel/start.c +++ b/kernel/start.c @@ -10,8 +10,8 @@ void timerinit(); // entry.S needs one stack per CPU. __attribute__ ((aligned (16))) char stack0[4096 * NCPU]; -// scratch area for timer interrupt, one per CPU. -uint64 mscratch0[NCPU * 32]; +// a scratch area per CPU for machine-mode timer interrupts. +uint64 timer_scratch[NCPU][5]; // assembly code in kernelvec.S for machine-mode timer interrupt. extern void timervec(); @@ -64,12 +64,12 @@ timerinit() *(uint64*)CLINT_MTIMECMP(id) = *(uint64*)CLINT_MTIME + interval; // prepare information in scratch[] for timervec. - // scratch[0..3] : space for timervec to save registers. - // scratch[4] : address of CLINT MTIMECMP register. - // scratch[5] : desired interval (in cycles) between timer interrupts. - uint64 *scratch = &mscratch0[32 * id]; - scratch[4] = CLINT_MTIMECMP(id); - scratch[5] = interval; + // scratch[0..2] : space for timervec to save registers. + // scratch[3] : address of CLINT MTIMECMP register. + // scratch[4] : desired interval (in cycles) between timer interrupts. + uint64 *scratch = &timer_scratch[id][0]; + scratch[3] = CLINT_MTIMECMP(id); + scratch[4] = interval; w_mscratch((uint64)scratch); // set the machine-mode trap handler. |