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author | Frans Kaashoek <[email protected]> | 2016-09-02 08:31:13 -0400 |
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committer | Frans Kaashoek <[email protected]> | 2016-09-02 08:31:13 -0400 |
commit | ae15515d80559ff95b315e3342c3baa00b87be1c (patch) | |
tree | b61b17981cce96f0b66efc77a7ce479e3e66a843 /lapic.c | |
parent | 37939f24c2fbb12a57a628fedd024a4865741e74 (diff) | |
download | xv6-labs-ae15515d80559ff95b315e3342c3baa00b87be1c.tar.gz xv6-labs-ae15515d80559ff95b315e3342c3baa00b87be1c.tar.bz2 xv6-labs-ae15515d80559ff95b315e3342c3baa00b87be1c.zip |
APIC IDs may not be consecutive and start from zero, so we cannot really use it
as a direct index into cpus. Record apicid in struct cpu and have cpunum() look
for it. Replace cpu->id with cpunum() everywhere, and replace cpu->id with cpu->apicid.
Thanks to Xi Wang.
Diffstat (limited to 'lapic.c')
-rw-r--r-- | lapic.c | 16 |
1 files changed, 13 insertions, 3 deletions
@@ -1,6 +1,7 @@ // The local APIC manages internal (non-I/O) interrupts. // See Chapter 8 & Appendix C of Intel processor manual volume 3. +#include "param.h" #include "types.h" #include "defs.h" #include "date.h" @@ -8,6 +9,7 @@ #include "traps.h" #include "mmu.h" #include "x86.h" +#include "proc.h" // ncpu // Local APIC registers, divided by 4 for use as uint[] indices. #define ID (0x0020/4) // ID @@ -99,6 +101,8 @@ lapicinit(void) int cpunum(void) { + int apicid, i; + // Cannot call cpu when interrupts are enabled: // result not guaranteed to last long enough to be used! // Would prefer to panic but even printing is chancy here: @@ -111,9 +115,15 @@ cpunum(void) __builtin_return_address(0)); } - if(lapic) - return lapic[ID]>>24; - return 0; + if (!lapic) + return 0; + + apicid = lapic[ID] >> 24; + for (i = 0; i < ncpu; ++i) { + if (cpus[i].apicid == apicid) + return i; + } + panic("unknown apicid\n"); } // Acknowledge interrupt. |