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authorrsc <rsc>2007-08-22 06:01:32 +0000
committerrsc <rsc>2007-08-22 06:01:32 +0000
commiteaea18cb9cbb86018dae8f1decfa217ecbe85fa5 (patch)
tree98c4a9b852ad9b6aaf16016417cf5eeee0b3857e /main.c
parent3dcf889c1b5c2c5ddf5b4756f2a731c344f6f08e (diff)
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PDF at http://am.lcs.mit.edu/~rsc/xv6.pdf
Various changes made while offline. + bwrite sector argument is redundant; use b->sector. + reformatting of files for nicer PDF page breaks + distinguish between locked, unlocked inodes in type signatures + change FD_FILE to FD_INODE + move userinit (nee proc0init) to proc.c + move ROOTDEV to param.h + always parenthesize sizeof argument
Diffstat (limited to 'main.c')
-rw-r--r--main.c82
1 files changed, 21 insertions, 61 deletions
diff --git a/main.c b/main.c
index aea5d80..6ef8da1 100644
--- a/main.c
+++ b/main.c
@@ -12,8 +12,6 @@
extern char edata[], end[];
-void proc0init();
-
// Bootstrap processor starts running C code here.
// This is called main0 not main so that it can have
// a void return type. Gcc can't handle functions named
@@ -35,49 +33,37 @@ main0(void)
bcpu = mp_bcpu();
// switch to bootstrap processor's stack
- asm volatile("movl %0, %%esp" : : "r" (cpus[bcpu].mpstack + MPSTACK - 32));
- asm volatile("movl %0, %%ebp" : : "r" (cpus[bcpu].mpstack + MPSTACK));
+ asm volatile("movl %0, %%esp" : : "r" (cpus[bcpu].mpstack+MPSTACK-32));
+ asm volatile("movl %0, %%ebp" : : "r" (cpus[bcpu].mpstack+MPSTACK));
lapic_init(bcpu);
cprintf("\ncpu%d: starting xv6\n\n", cpu());
- pinit(); // process table
- binit(); // buffer cache
- pic_init();
- ioapic_init();
- kinit(); // physical memory allocator
- tvinit(); // trap vectors
- idtinit(); // this CPU's interrupt descriptor table
- fileinit();
- iinit(); // i-node table
-
- // make sure there's a TSS
- setupsegs(0);
-
- // initialize I/O devices, let them enable interrupts
- console_init();
- ide_init();
-
- // start other CPUs
- mp_startthem();
-
- // turn on timer
- if(ismp)
- lapic_timerinit();
- else
- pit8253_timerinit();
-
- // enable interrupts on the local APIC
- lapic_enableintr();
+ pinit(); // process table
+ binit(); // buffer cache
+ pic_init(); // interrupt controller
+ ioapic_init(); // another interrupt controller
+ kinit(); // physical memory allocator
+ tvinit(); // trap vectors
+ idtinit(); // interrupt descriptor table
+ fileinit(); // file table
+ iinit(); // inode cache
+ setupsegs(0); // segments & TSS
+ console_init(); // I/O devices & their interrupts
+ ide_init(); // disk
+ mp_startthem(); // other CPUs
+ if(ismp){
+ lapic_timerinit(); // smp timer
+ lapic_enableintr(); // local interrupts
+ }else
+ pit8253_timerinit(); // uniprocessor timer
+ userinit(); // first user process
// enable interrupts on this processor.
cpus[cpu()].nlock--;
sti();
- // initialize process 0
- proc0init();
-
scheduler();
}
@@ -106,29 +92,3 @@ mpmain(void)
scheduler();
}
-void
-proc0init(void)
-{
- struct proc *p;
- extern uchar _binary_initcode_start[], _binary_initcode_size[];
-
- p = copyproc(0);
- p->sz = PAGE;
- p->mem = kalloc(p->sz);
- p->cwd = igetroot();
- memset(&p->tf, 0, sizeof p->tf);
- p->tf->es = p->tf->ds = p->tf->ss = (SEG_UDATA << 3) | DPL_USER;
- p->tf->cs = (SEG_UCODE << 3) | DPL_USER;
- p->tf->eflags = FL_IF;
- p->tf->esp = p->sz;
-
- // Push dummy return address to placate gcc.
- p->tf->esp -= 4;
- *(uint*)(p->mem + p->tf->esp) = 0xefefefef;
-
- p->tf->eip = 0;
- memmove(p->mem, _binary_initcode_start, (int)_binary_initcode_size);
- safestrcpy(p->name, "initcode", sizeof p->name);
- p->state = RUNNABLE;
-}
-