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authorrsc <rsc>2006-07-16 16:55:52 +0000
committerrsc <rsc>2006-07-16 16:55:52 +0000
commit564f787e916392af7b1960d079abf110234305d4 (patch)
treead3095388d6723fdb177303a25de38477571c33b /mmu.h
parent6e6a1dd7d717246f58bc3bbdf2a32e7e3f901cf3 (diff)
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Eliminate annoying Pseudodesc structure.
Eliminate unnecessary parts of mmu.h.
Diffstat (limited to 'mmu.h')
-rw-r--r--mmu.h100
1 files changed, 3 insertions, 97 deletions
diff --git a/mmu.h b/mmu.h
index b90a9e3..829815d 100644
--- a/mmu.h
+++ b/mmu.h
@@ -5,95 +5,10 @@
*/
/*
- *
- * Part 1. Paging data structures and constants.
- *
+ * Register flags and fundamental constants.
*/
-// A linear address 'la' has a three-part structure as follows:
-//
-// +--------10------+-------10-------+---------12----------+
-// | Page Directory | Page Table | Offset within Page |
-// | Index | Index | |
-// +----------------+----------------+---------------------+
-// \--- PDX(la) --/ \--- PTX(la) --/ \---- PGOFF(la) ----/
-// \----------- PPN(la) -----------/
-//
-// The PDX, PTX, PGOFF, and PPN macros decompose linear addresses as shown.
-// To construct a linear address la from PDX(la), PTX(la), and PGOFF(la),
-// use PGADDR(PDX(la), PTX(la), PGOFF(la)).
-
-// page number field of address
-#define PPN(la) (((uintptr_t) (la)) >> PTXSHIFT)
-#define VPN(la) PPN(la) // used to index into vpt[]
-
-// page directory index
-#define PDX(la) ((((uintptr_t) (la)) >> PDXSHIFT) & 0x3FF)
-#define VPD(la) PDX(la) // used to index into vpd[]
-
-// page table index
-#define PTX(la) ((((uintptr_t) (la)) >> PTXSHIFT) & 0x3FF)
-
-// offset in page
-#define PGOFF(la) (((uintptr_t) (la)) & 0xFFF)
-
-// construct linear address from indexes and offset
-#define PGADDR(d, t, o) ((void*) ((d) << PDXSHIFT | (t) << PTXSHIFT | (o)))
-
-// Page directory and page table constants.
-#define NPDENTRIES 1024 // page directory entries per page directory
-#define NPTENTRIES 1024 // page table entries per page table
-
#define PGSIZE 4096 // bytes mapped by a page
-#define PGSHIFT 12 // log2(PGSIZE)
-
-#define PTSIZE (PGSIZE*NPTENTRIES) // bytes mapped by a page directory entry
-#define PTSHIFT 22 // log2(PTSIZE)
-
-#define PTXSHIFT 12 // offset of PTX in a linear address
-#define PDXSHIFT 22 // offset of PDX in a linear address
-
-// Page table/directory entry flags.
-#define PTE_P 0x001 // Present
-#define PTE_W 0x002 // Writeable
-#define PTE_U 0x004 // User
-#define PTE_PWT 0x008 // Write-Through
-#define PTE_PCD 0x010 // Cache-Disable
-#define PTE_A 0x020 // Accessed
-#define PTE_D 0x040 // Dirty
-#define PTE_PS 0x080 // Page Size
-#define PTE_MBZ 0x180 // Bits must be zero
-
-// The PTE_AVAIL bits aren't used by the kernel or interpreted by the
-// hardware, so user processes are allowed to set them arbitrarily.
-#define PTE_AVAIL 0xE00 // Available for software use
-
-// Only flags in PTE_USER may be used in system calls.
-#define PTE_USER (PTE_AVAIL | PTE_P | PTE_W | PTE_U)
-
-// address in page table entry
-#define PTE_ADDR(pte) ((physaddr_t) (pte) & ~0xFFF)
-
-// Control Register flags
-#define CR0_PE 0x00000001 // Protection Enable
-#define CR0_MP 0x00000002 // Monitor coProcessor
-#define CR0_EM 0x00000004 // Emulation
-#define CR0_TS 0x00000008 // Task Switched
-#define CR0_ET 0x00000010 // Extension Type
-#define CR0_NE 0x00000020 // Numeric Errror
-#define CR0_WP 0x00010000 // Write Protect
-#define CR0_AM 0x00040000 // Alignment Mask
-#define CR0_NW 0x20000000 // Not Writethrough
-#define CR0_CD 0x40000000 // Cache Disable
-#define CR0_PG 0x80000000 // Paging
-
-#define CR4_PCE 0x00000100 // Performance counter enable
-#define CR4_MCE 0x00000040 // Machine Check Enable
-#define CR4_PSE 0x00000010 // Page Size Extensions
-#define CR4_DE 0x00000008 // Debugging Extensions
-#define CR4_TSD 0x00000004 // Time Stamp Disable
-#define CR4_PVI 0x00000002 // Protected-Mode Virtual Interrupts
-#define CR4_VME 0x00000001 // V86 Mode Extensions
// Eflags register
#define FL_CF 0x00000001 // Carry Flag
@@ -123,10 +38,9 @@
#define FEC_WR 0x2 // Page fault caused by a write
#define FEC_U 0x4 // Page fault occured while in user mode
-
/*
*
- * Part 2. Segmentation data structures and constants.
+ * Segmentation data structures and constants.
*
*/
@@ -202,7 +116,7 @@ struct Segdesc {
/*
*
- * Part 3. Traps.
+ * Traps.
*
*/
@@ -296,13 +210,5 @@ struct Gatedesc {
(gate).off_31_16 = (uint32_t) (off) >> 16; \
}
-// Pseudo-descriptors used for LGDT, LLDT and LIDT instructions.
-struct Pseudodesc {
- uint16_t _garbage; // LGDT supposed to be from address 4N+2
- uint16_t lim; // Limit
- uint32_t base __attribute__ ((packed)); // Base address
-};
-#define PD_ADDR(desc) (&(desc).pd_lim)
-
#endif /* !__ASSEMBLER__ */