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authorAustin Clements <[email protected]>2011-08-29 16:12:01 -0400
committerAustin Clements <[email protected]>2011-08-29 16:12:01 -0400
commita7061b4f9717e85ebedf87244921d37babc5d8f4 (patch)
treed0da825082a1c7f179f2e8b04f1c9b9a6ccbe9e0 /mmu.h
parent16f205b5c9de7b49dcff44f2f14377799624083a (diff)
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Style nits; indentation and tabs
Diffstat (limited to 'mmu.h')
-rw-r--r--mmu.h60
1 files changed, 30 insertions, 30 deletions
diff --git a/mmu.h b/mmu.h
index e5a4f1e..0da30e7 100644
--- a/mmu.h
+++ b/mmu.h
@@ -25,19 +25,19 @@
#define FL_ID 0x00200000 // ID flag
// Control Register flags
-#define CR0_PE 0x00000001 // Protection Enable
-#define CR0_MP 0x00000002 // Monitor coProcessor
-#define CR0_EM 0x00000004 // Emulation
-#define CR0_TS 0x00000008 // Task Switched
-#define CR0_ET 0x00000010 // Extension Type
-#define CR0_NE 0x00000020 // Numeric Errror
-#define CR0_WP 0x00010000 // Write Protect
-#define CR0_AM 0x00040000 // Alignment Mask
-#define CR0_NW 0x20000000 // Not Writethrough
-#define CR0_CD 0x40000000 // Cache Disable
-#define CR0_PG 0x80000000 // Paging
-
-#define CR4_PSE 0x00000010 // Page size extension
+#define CR0_PE 0x00000001 // Protection Enable
+#define CR0_MP 0x00000002 // Monitor coProcessor
+#define CR0_EM 0x00000004 // Emulation
+#define CR0_TS 0x00000008 // Task Switched
+#define CR0_ET 0x00000010 // Extension Type
+#define CR0_NE 0x00000020 // Numeric Errror
+#define CR0_WP 0x00010000 // Write Protect
+#define CR0_AM 0x00040000 // Alignment Mask
+#define CR0_NW 0x20000000 // Not Writethrough
+#define CR0_CD 0x40000000 // Cache Disable
+#define CR0_PG 0x80000000 // Paging
+
+#define CR4_PSE 0x00000010 // Page size extension
#define SEG_KCODE 1 // kernel code
#define SEG_KDATA 2 // kernel data+stack
@@ -109,39 +109,39 @@ struct segdesc {
// \--- PDX(va) --/ \--- PTX(va) --/
// page directory index
-#define PDX(va) (((uint)(va) >> PDXSHIFT) & 0x3FF)
+#define PDX(va) (((uint)(va) >> PDXSHIFT) & 0x3FF)
// page table index
-#define PTX(va) (((uint)(va) >> PTXSHIFT) & 0x3FF)
+#define PTX(va) (((uint)(va) >> PTXSHIFT) & 0x3FF)
// construct virtual address from indexes and offset
-#define PGADDR(d, t, o) ((uint)((d) << PDXSHIFT | (t) << PTXSHIFT | (o)))
+#define PGADDR(d, t, o) ((uint)((d) << PDXSHIFT | (t) << PTXSHIFT | (o)))
// Page directory and page table constants.
-#define NPDENTRIES 1024 // page directory entries per page directory
-#define NPTENTRIES 1024 // page table entries per page table
+#define NPDENTRIES 1024 // page directory entries per page directory
+#define NPTENTRIES 1024 // page table entries per page table
#define PGSIZE 4096 // bytes mapped by a page
#define PGSHIFT 12 // log2(PGSIZE)
-#define PTXSHIFT 12 // offset of PTX in a linear address
-#define PDXSHIFT 22 // offset of PDX in a linear address
+#define PTXSHIFT 12 // offset of PTX in a linear address
+#define PDXSHIFT 22 // offset of PDX in a linear address
#define PGROUNDUP(sz) (((sz)+PGSIZE-1) & ~(PGSIZE-1))
#define PGROUNDDOWN(a) (((a)) & ~(PGSIZE-1))
// Page table/directory entry flags.
-#define PTE_P 0x001 // Present
-#define PTE_W 0x002 // Writeable
-#define PTE_U 0x004 // User
-#define PTE_PWT 0x008 // Write-Through
-#define PTE_PCD 0x010 // Cache-Disable
-#define PTE_A 0x020 // Accessed
-#define PTE_D 0x040 // Dirty
-#define PTE_PS 0x080 // Page Size
-#define PTE_MBZ 0x180 // Bits must be zero
+#define PTE_P 0x001 // Present
+#define PTE_W 0x002 // Writeable
+#define PTE_U 0x004 // User
+#define PTE_PWT 0x008 // Write-Through
+#define PTE_PCD 0x010 // Cache-Disable
+#define PTE_A 0x020 // Accessed
+#define PTE_D 0x040 // Dirty
+#define PTE_PS 0x080 // Page Size
+#define PTE_MBZ 0x180 // Bits must be zero
// Address in page table or page directory entry
-#define PTE_ADDR(pte) ((uint)(pte) & ~0xFFF)
+#define PTE_ADDR(pte) ((uint)(pte) & ~0xFFF)
#ifndef __ASSEMBLER__
typedef uint pte_t;