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authorFrans Kaashoek <[email protected]>2018-10-09 20:22:48 -0400
committerFrans Kaashoek <[email protected]>2018-10-09 20:22:48 -0400
commita7ca32e3a3ec2d3c1947a06fbcde0f779b0b1fec (patch)
tree9f984054071e2724e5f1a96e0dd73a50c7b29db1 /proc.c
parent821ee3fc99b6363d7799d4f5cfa629e36b554dbf (diff)
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Change mycpu() to use %gs.
Diffstat (limited to 'proc.c')
-rw-r--r--proc.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/proc.c b/proc.c
index 55e435c..3c0acbd 100644
--- a/proc.c
+++ b/proc.c
@@ -37,16 +37,15 @@ cpuid() {
// Must be called with interrupts disabled to avoid the caller being
// rescheduled between reading lapicid and running through the loop.
struct cpu*
-mycpu(void)
+getmycpu(void)
{
int apicid, i;
if(readeflags()&FL_IF)
- panic("mycpu called with interrupts enabled\n");
+ panic("getmycpu called with interrupts enabled\n");
apicid = lapicid();
- // APIC IDs are not guaranteed to be contiguous. Maybe we should have
- // a reverse map, or reserve a register to store &cpus[i].
+ // APIC IDs are not guaranteed to be contiguous.
for (i = 0; i < ncpu; ++i) {
if (cpus[i].apicid == apicid)
return &cpus[i];
@@ -54,6 +53,15 @@ mycpu(void)
panic("unknown apicid\n");
}
+// Return this core's cpu struct using %gs. %gs points this core's struct
+// cpu. Offet 24 in struct cpu is cpu.
+struct cpu*
+mycpu(void) {
+ struct cpu *c;
+ asm volatile("mov %%gs:24, %0" : "=r" (c));
+ return c;
+}
+
// Disable interrupts so that we are not rescheduled
// while reading proc from the cpu structure
struct proc*