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authorRobert Morris <[email protected]>2019-06-06 13:54:03 -0400
committerRobert Morris <[email protected]>2019-06-06 13:54:03 -0400
commit91ba81110acd3163f7de3580b677eece0c57f5e7 (patch)
tree670536a7f365e75282048b5447a107338b677642 /spinlock.c
parent8607051b5fc79fffa319b913b19e99bc5b90e063 (diff)
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gdb backtraces: -ggdb, -fno-omit-frame-pointer, BSIZE=1024
Diffstat (limited to 'spinlock.c')
-rw-r--r--spinlock.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/spinlock.c b/spinlock.c
index 8b3c3f0..bbb7cb5 100644
--- a/spinlock.c
+++ b/spinlock.c
@@ -56,11 +56,13 @@ release(struct spinlock *lk)
// section are visible to other cores before the lock is released.
// Both the C compiler and the hardware may re-order loads and
// stores; __sync_synchronize() tells them both not to.
+ // On RISC-V, this turns into a fence instruction.
__sync_synchronize();
// Release the lock, equivalent to lk->locked = 0.
// This code can't use a C assignment, since it might
// not be atomic. A real OS would use C atomics here.
+ // On RISC-V, use an amoswap instruction.
//asm volatile("movl $0, %0" : "+m" (lk->locked) : );
__sync_lock_release(&lk->locked);
@@ -73,7 +75,7 @@ holding(struct spinlock *lk)
{
int r;
push_off();
- r = lk->locked && lk->cpu == mycpu();
+ r = (lk->locked && lk->cpu == mycpu());
pop_off();
return r;
}