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author | Robert Morris <rtm@csail.mit.edu> | 2019-06-04 14:20:37 -0400 |
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committer | Robert Morris <rtm@csail.mit.edu> | 2019-06-04 14:20:37 -0400 |
commit | a82772594e1807632b3650bff111108f250de3b7 (patch) | |
tree | 98581a6fa9bfd5ecbabe8052b112c4166c7f9e9e /start.c | |
parent | cff3ce6e04ce4a353324630df788df21566807a6 (diff) | |
download | xv6-labs-a82772594e1807632b3650bff111108f250de3b7.tar.gz xv6-labs-a82772594e1807632b3650bff111108f250de3b7.tar.bz2 xv6-labs-a82772594e1807632b3650bff111108f250de3b7.zip |
timer interrupts -> supervisor software interrupt
Diffstat (limited to 'start.c')
-rw-r--r-- | start.c | 24 |
1 files changed, 23 insertions, 1 deletions
@@ -8,6 +8,19 @@ void main(); // entry.S uses this as the initial stack. __attribute__ ((aligned (16))) char stack0[4096]; +// assembly code in kernelvec for machine-mode timer interrupt. +extern void machinevec(); + +// scratch area for timer interrupt. +uint64 mscratch0[8]; + +__attribute__ ((aligned (16))) +void +xyzzy() +{ + uartputc('I'); +} + // entry.S jumps here in machine mode on stack0. void mstart() @@ -28,7 +41,16 @@ mstart() // delegate all interrupts and exceptions to supervisor mode. w_medeleg(0xffff); w_mideleg(0xffff); - + + // set up to receive timer interrupts in machine mode. + *(uint64*)CLINT_MTIMECMP0 = *(uint64*)CLINT_MTIME + 10000; + mscratch0[4] = CLINT_MTIMECMP0; + mscratch0[5] = 10000000; + w_mscratch((uint64)mscratch0); + w_mtvec((uint64)machinevec); + w_mstatus(r_mstatus() | MSTATUS_MIE); + w_mie(r_mie() | MIE_MTIE); + // jump to main in supervisor mode. asm("mret"); } |