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-rw-r--r--console.c6
-rw-r--r--defs.h2
-rw-r--r--ide.c2
-rw-r--r--init.c4
-rw-r--r--ioapic.c1
-rw-r--r--kbd.c1
-rw-r--r--mp.c2
-rw-r--r--picirq.c23
-rw-r--r--timer.c2
9 files changed, 25 insertions, 18 deletions
diff --git a/console.c b/console.c
index 22b4b23..236beaa 100644
--- a/console.c
+++ b/console.c
@@ -1,3 +1,7 @@
+// Console input and output.
+// Input is from the keyboard only.
+// Output is written to the screen and the printer port.
+
#include "types.h"
#include "defs.h"
#include "param.h"
@@ -278,7 +282,7 @@ console_init(void)
devsw[CONSOLE].read = console_read;
//use_console_lock = 1;
- irq_enable(IRQ_KBD);
+ pic_enable(IRQ_KBD);
ioapic_enable(IRQ_KBD, 0);
}
diff --git a/defs.h b/defs.h
index 35323ea..fa9c502 100644
--- a/defs.h
+++ b/defs.h
@@ -85,7 +85,7 @@ void mp_init(void);
void mp_startthem(void);
// picirq.c
-void irq_enable(int);
+void pic_enable(int);
void pic_init(void);
// pipe.c
diff --git a/ide.c b/ide.c
index 78c3123..7445797 100644
--- a/ide.c
+++ b/ide.c
@@ -47,7 +47,7 @@ ide_init(void)
int i;
initlock(&ide_lock, "ide");
- irq_enable(IRQ_IDE);
+ pic_enable(IRQ_IDE);
ioapic_enable(IRQ_IDE, ncpu - 1);
ide_wait_ready(0);
diff --git a/init.c b/init.c
index d3e1182..e15cccf 100644
--- a/init.c
+++ b/init.c
@@ -1,10 +1,10 @@
+// init: The initial user-level program
+
#include "types.h"
#include "stat.h"
#include "user.h"
#include "fcntl.h"
-// init: The initial user-level program
-
char *sh_args[] = { "sh", 0 };
int
diff --git a/ioapic.c b/ioapic.c
index 8da3151..65eec1f 100644
--- a/ioapic.c
+++ b/ioapic.c
@@ -1,5 +1,6 @@
// The I/O APIC manages hardware interrupts for an SMP system.
// http://www.intel.com/design/chipsets/datashts/29056601.pdf
+// See also picirq.c.
#include "types.h"
#include "defs.h"
diff --git a/kbd.c b/kbd.c
index a4a4a4e..2483949 100644
--- a/kbd.c
+++ b/kbd.c
@@ -48,4 +48,3 @@ kbd_intr(void)
{
console_intr(kbd_getc);
}
-
diff --git a/mp.c b/mp.c
index cc2ab06..af9e72b 100644
--- a/mp.c
+++ b/mp.c
@@ -1,3 +1,5 @@
+// Multiprocessor bootstrap.
+// Search memory for MP description structures.
// http://developer.intel.com/design/pentium/datashts/24201606.pdf
#include "types.h"
diff --git a/picirq.c b/picirq.c
index 7c5f713..1cc9953 100644
--- a/picirq.c
+++ b/picirq.c
@@ -1,8 +1,10 @@
+// Intel 8259A programmable interrupt controllers.
+
#include "types.h"
#include "x86.h"
#include "traps.h"
-// I/O Addresses of the two 8259A programmable interrupt controllers
+// I/O Addresses of the two programmable interrupt controllers
#define IO_PIC1 0x20 // Master (IRQs 0-7)
#define IO_PIC2 0xA0 // Slave (IRQs 8-15)
@@ -10,21 +12,20 @@
// Current IRQ mask.
// Initial IRQ mask has interrupt 2 enabled (for slave 8259A).
-static ushort irq_mask_8259A = 0xFFFF & ~(1<<IRQ_SLAVE);
+static ushort irqmask = 0xFFFF & ~(1<<IRQ_SLAVE);
static void
-irq_setmask_8259A(ushort mask)
+pic_setmask(ushort mask)
{
- irq_mask_8259A = mask;
-
- outb(IO_PIC1+1, (char)mask);
- outb(IO_PIC2+1, (char)(mask >> 8));
+ irqmask = mask;
+ outb(IO_PIC1+1, mask);
+ outb(IO_PIC2+1, mask >> 8);
}
void
-irq_enable(int irq)
+pic_enable(int irq)
{
- irq_setmask_8259A(irq_mask_8259A & ~(1<<irq));
+ pic_setmask(irqmask & ~(1<<irq));
}
// Initialize the 8259A interrupt controllers.
@@ -78,6 +79,6 @@ pic_init(void)
outb(IO_PIC2, 0x68); // OCW3
outb(IO_PIC2, 0x0a); // OCW3
- if(irq_mask_8259A != 0xFFFF)
- irq_setmask_8259A(irq_mask_8259A);
+ if(irqmask != 0xFFFF)
+ pic_setmask(irqmask);
}
diff --git a/timer.c b/timer.c
index ba4e6c4..89700dc 100644
--- a/timer.c
+++ b/timer.c
@@ -28,5 +28,5 @@ timer_init(void)
outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
outb(IO_TIMER1, TIMER_DIV(100) % 256);
outb(IO_TIMER1, TIMER_DIV(100) / 256);
- irq_enable(IRQ_TIMER);
+ pic_enable(IRQ_TIMER);
}