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2008-10-15update .cvsignorekolya1-0/+2
2008-10-12minor cleanupkolya2-3/+3
2008-10-12minor cleanup with STUB macrokolya1-1/+3
2008-10-12include explicitly initialized globals (int x = 0;) in cross-refs,kolya2-5/+2
also thanks to greg price.
2008-10-12fix: when two names only differed in case, crossrefs only included one of them.kolya1-1/+1
thanks to greg price.
2008-10-08be clear what the root i-number isrtm3-2/+3
2008-09-28document lock->locked=0 vs xchg(&lock->locked, 0)rtm1-4/+8
2008-09-24trap 9 does not push ec: fix from Greg Price <[email protected]>kolya1-1/+1
2008-09-24always save and restore %fs, %gs to ensure old segment entries are neverkolya2-4/+12
accessible to user from the hidden CPU segment registers.
2008-09-11restore std toolprefixrtm2-2/+2
2008-09-11omit *.d from tar filertm3-3/+2
2008-09-09add copyright noticekaashoek1-1/+2
2008-09-03make bochsrc work for bochs 2.2.6kolya2-1/+1
2008-09-03make pdf, ps, tarballkolya3-12454/+12697
2008-09-03nits in index.txtkaashoek9-13/+19
add slides for shell, x86 intro, x86 virtual memory (deleted JOS from slides)
2008-09-03DO NOT MAIL: xv6 web pagesrsc37-0/+9034
2008-08-28simplify growprocrtm1-3/+2
2008-08-28avoid a bug w/ exit()rtm1-0/+1
2008-08-28the old explanation of AP startup might have been correct, butrtm1-9/+10
I understand this one.
2008-08-22clean up circular buffers, so pipe can queue 512 bytes rather than 511kolya2-14/+12
2008-08-21fix obvious printf nits after reading through codekolya2-2/+2
2008-08-20now rev2rsc1-1/+1
2008-08-20add nice fontrsc2-1/+704
2008-08-20formatting updatesrsc2-43/+33
2008-08-20bochs fasterrsc1-1/+1
2008-08-20xv6: latest (as of January 2008)rsc2-0/+0
2007-12-20oops - wrong bit (vic zandy)rsc1-1/+1
2007-11-28fork minibugrsc2-1/+27
2007-11-28More complete lapic startup (thanks Silas)rsc1-8/+26
2007-11-28bda[0xE] is a 16-bit segment number,rsc1-1/+1
not a real address. So shift 4. Reported by Silas. Jim McKie says this code only matters on ancient EISA MP systems.
2007-10-20proc_wait -> waitrtm1-1/+1
2007-10-12Model verifying that wakeup reallyrsc2-0/+150
can be called after release without causing deadlock.
2007-10-01Incorporate new understanding of/with Intel SMP spec.rsc5-36/+25
Dropped cmpxchg in favor of xchg, to match lecture notes. Use xchg to release lock, for future protection and to keep gcc from acting clever.
2007-09-30Re: why cpuid() in locking code?rsc3-9/+9
rtm wrote: > Why does acquire() call cpuid()? Why does release() call cpuid()? The cpuid in acquire is redundant with the cmpxchg, as you said. I have removed the cpuid from acquire. The cpuid in release is actually doing something important, but not on the hardware. It keeps gcc from reordering the lock->locked assignment above the other two during optimization. (Not that current gcc -O2 would choose to do that, but it is allowed to.) I have replaced the cpuid in release with a "gcc barrier" that keeps gcc from moving things around but has no hardware effect. On a related note, I don't think the cpuid in mpmain is necessary, for the same reason that the cpuid wasn't needed in release. As to the question of whether acquire(); x = protected; release(); might read protected after release(), I still haven't convinced myself whether it can. I'll put the cpuid back into release if we determine that it can. Russ
2007-09-30tricksrsc1-0/+106
2007-09-27interrupts during system callsrsc1-1/+1
"It just works."
2007-09-27Final word on the locking fiasco?rsc5-33/+24
Change pushcli / popcli so that they can never turn on interrupts unexpectedly. That is, if interrupts are on, then pushcli(); popcli(); turns them off and back on, but if they are off to begin with, then pushcli(); popcli(); is a no-op. I think our fundamental mistake was having a primitive (release and then popcli nee spllo) that could turn interrupts on at unexpected moments instead of being explicit about when we want to start allowing interrupts. With the new semantics, all the manual fiddling of ncli to force interrupts off in certain sections goes away. In return, we must explicitly mark the places where we want to enable interrupts unconditionally, by calling sti(). There is only one: inside the scheduler loop.
2007-09-27cleanerrsc2-11/+3
2007-09-27yank out stack overflow checking uglinessrsc4-14/+2
2007-09-27okay, that was long enough - revertrsc3-16/+14
2007-09-27test: store curproc at top of stackrsc3-14/+16
I don't actually think this is worthwhile, but I figured I would check it in before reverting it, so that it can be in the revision history. Pros: * curproc doesn't need to turn on/off interrupts * scheduler doesn't have to edit curproc anymore Cons: * it's ugly * all the stack computation is more complicated. * it doesn't actually simplify anything but curproc, and even curproc is harder to follow.
2007-09-27nitrsc1-1/+1
2007-09-27rename splhi/spllo to pushcli/popclirsc6-22/+22
2007-09-27overkill: use segments to catch stack overflow (delete before next year)rsc3-2/+13
2007-09-27now spllo is okayrsc1-8/+2
2007-09-27better lapic writes, suggested by cliffrsc1-19/+26
2007-09-27use larger, allocated cpu stacksrsc2-23/+16
2007-09-27don't call it ss - that's the stack segmentrsc1-2/+2
2007-09-27kernel SMP interruptibility fixes.rsc10-33/+107
Last year, right before I sent xv6 to the printer, I changed the SETGATE calls so that interrupts would be disabled on entry to interrupt handlers, and I added the nlock++ / nlock-- in trap() so that interrupts would stay disabled while the hw handlers (but not the syscall handler) did their work. I did this because the kernel was otherwise causing Bochs to triple-fault in SMP mode, and time was short. Robert observed yesterday that something was keeping the SMP preemption user test from working. It turned out that when I simplified the lapic code I swapped the order of two register writes that I didn't realize were order dependent. I fixed that and then since I had everything paged in kept going and tried to figure out why you can't leave interrupts on during interrupt handlers. There are a few issues. First, there must be some way to keep interrupts from "stacking up" and overflowing the stack. Keeping interrupts off the whole time solves this problem -- even if the clock tick handler runs long enough that the next clock tick is waiting when it finishes, keeping interrupts off means that the handler runs all the way through the "iret" before the next handler begins. This is not really a problem unless you are putting too many prints in trap -- if the OS is doing its job right, the handlers should run quickly and not stack up. Second, if xv6 had page faults, then it would be important to keep interrupts disabled between the start of the interrupt and the time that cr2 was read, to avoid a scenario like: p1 page faults [cr2 set to faulting address] p1 starts executing trapasm.S clock interrupt, p1 preempted, p2 starts executing p2 page faults [cr2 set to another faulting address] p2 starts, finishes fault handler p1 rescheduled, reads cr2, sees wrong fault address Alternately p1 could be rescheduled on the other cpu, in which case it would still see the wrong cr2. That said, I think cr2 is the only interrupt state that isn't pushed onto the interrupt stack atomically at fault time, and xv6 doesn't care. (This isn't entirely hypothetical -- I debugged this problem on Plan 9.) Third, and this is the big one, it is not safe to call cpu() unless interrupts are disabled. If interrupts are enabled then there is no guarantee that, between the time cpu() looks up the cpu id and the time that it the result gets used, the process has not been rescheduled to the other cpu. For example, the very commonly-used expression curproc[cpu()] (aka the macro cp) can end up referring to the wrong proc: the code stores the result of cpu() in %eax, gets rescheduled to the other cpu at just the wrong instant, and then reads curproc[%eax]. We use curproc[cpu()] to get the current process a LOT. In that particular case, if we arranged for the current curproc entry to be addressed by %fs:0 and just use a different %fs on each CPU, then we could safely get at curproc even with interrupts disabled, since the read of %fs would be atomic with the read of %fs:0. Alternately, we could have a curproc() function that disables interrupts while computing curproc[cpu()]. I've done that last one. Even in the current kernel, with interrupts off on entry to trap, interrupts are enabled inside release if there are no locks held. Also, the scheduler's idle loop must be interruptible at times so that the clock and disk interrupts (which might make processes runnable) can be handled. In addition to the rampant use of curproc[cpu()], this little snippet from acquire is wrong on smp: if(cpus[cpu()].nlock == 0) cli(); cpus[cpu()].nlock++; because if interrupts are off then we might call cpu(), get rescheduled to a different cpu, look at cpus[oldcpu].nlock, and wrongly decide not to disable interrupts on the new cpu. The fix is to always call cli(). But this is wrong too: if(holding(lock)) panic("acquire"); cli(); cpus[cpu()].nlock++; because holding looks at cpu(). The fix is: cli(); if(holding(lock)) panic("acquire"); cpus[cpu()].nlock++; I've done that, and I changed cpu() to complain the first time it gets called with interrupts disabled. (It gets called too much to complain every time.) I added new functions splhi and spllo that are like acquire and release but without the locking: void splhi(void) { cli(); cpus[cpu()].nsplhi++; } void spllo(void) { if(--cpus[cpu()].nsplhi == 0) sti(); } and I've used those to protect other sections of code that refer to cpu() when interrupts would otherwise be disabled (basically just curproc and setupsegs). I also use them in acquire/release and got rid of nlock. I'm not thrilled with the names, but I think the concept -- a counted cli/sti -- is sound. Having them also replaces the nlock++/nlock-- in trap.c and main.c, which is nice. Final note: it's still not safe to enable interrupts in the middle of trap() between lapic_eoi and returning to user space. I don't understand why, but we get a fault on pop %es because 0x10 is a bad segment descriptor (!) and then the fault faults trying to go into a new interrupt because 0x8 is a bad segment descriptor too! Triple fault. I haven't debugged this yet.
2007-09-27use console lockrsc1-1/+1