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2020-10-03Corrects order of UART RX/TX interrupt enable bitsMatt Harvey1-2/+2
(per http://byterunner.com/16550.html and manually tested in qemu bare metal echo)
2020-10-03Fix minor typosFumiya Shigemitsu1-1/+1
2020-10-03Clarify CLINT and PLIC acronymFrans Kaashoek1-2/+2
2020-10-02Add s to many printf statements that expect it (thanks Cece Chu)Frans Kaashoek1-21/+19
Add dirtest to the list of tests
2020-09-30Merge branch 'riscv' of g.csail.mit.edu:xv6-dev into riscvRobert Morris2-0/+50
2020-09-24When either_copyin/out fails, return an error from write/readFrans Kaashoek2-0/+50
Add a test to check that read/write return an error
2020-09-06better grind error messagesRobert Morris1-19/+19
2020-08-28Delete doc dir because they take much space in student submissionsFrans Kaashoek5-0/+0
2020-08-28move panicked check to uart.cRobert Morris4-16/+32
2020-08-28suppress write() output after panic()Robert Morris2-1/+7
2020-08-27Remove obselete ifdef that shouldn't have been there everFrans Kaashoek1-4/+0
2020-08-27fix usertests to pass all the riscv-sol-fall20 solutions.Robert Morris1-22/+97
2020-08-21Adjust a few prototypes to be explicit that they don't take argumentsFrans Kaashoek1-4/+4
2020-08-19touch sbrk()-allocated memory to make sure it existsRobert Morris1-2/+14
2020-08-19usertest for exec() out of memory recoveryRobert Morris3-4/+42
and fix a few exec() bugs
2020-08-18Use the major number defined in file.h. The minor number is ignored;Frans Kaashoek1-1/+5
might as well use 0.
2020-08-17Delete some obselete stuffFrans Kaashoek2-59/+0
2020-08-15xRobert Morris3-15/+21
2020-08-13fix a bug in the out-of-memory handling code in execRobert Morris2-5/+5
2020-08-13handle another out-of-memory in fork(). the policy here is not consistent,Robert Morris3-3/+10
since other calls (e.g. exec()) panic on out of memory.
2020-08-13try to handle a few of the possible out-of-memory errors in fork()Robert Morris1-5/+18
2020-08-13modify uvmunmap() to be in aligned pagesRobert Morris2-21/+18
fix a bug in fork() recovering from out of memory
2020-08-13Merge branch 'riscv' of g.csail.mit.edu:xv6-dev into riscvRobert Morris11-23/+26
2020-08-13pa isn't needed in the uvmunmap() loopRobert Morris1-3/+1
2020-08-10Update to the latest specsFrans Kaashoek4-0/+0
2020-08-10copyright and 6.S081Frans Kaashoek1-2/+2
2020-08-10Ack bug finders.Frans Kaashoek1-9/+11
2020-08-10Typo (thanks yt <[email protected]>)Frans Kaashoek1-1/+1
2020-08-10Generate initcode without compressed extensionsFrans Kaashoek1-1/+1
2020-08-10update initcode to avoid using the compressed extensionAsami Doi1-7/+7
2020-08-10Write interrupt ack register in virtio_disk_intr()Takahiro1-0/+1
2020-08-10Update ramdisk.cJonathan Kimmitt1-1/+1
The qemu syntax for a ram disk was documented incorrectly. The documented syntax is here: https://qemu.weilnetz.de/doc/qemu-doc.html
2020-08-10Fix minor typosFumiya Shigemitsu1-2/+2
2020-08-07test string system call arguments that cross over the end of the last page.Robert Morris1-0/+53
2020-08-07test copyinstr()'s handling of the terminating nullRobert Morris1-2/+64
2020-08-07streamline copyin/copyout code in usertestsRobert Morris4-77/+86
fix bugs in read/write return values when there's an error
2020-08-07test pointer checking in copyin, copyout, copyinstrRobert Morris1-0/+92
2020-08-07Merge branch 'riscv' of g.csail.mit.edu:xv6-dev into riscvRobert Morris1-6/+6
2020-08-07modify each page in usertests countfree()Robert Morris4-9/+11
get rid of static for walk() and freewalk()
2020-08-06Change tf -> trapframe in a few commentsFrans Kaashoek1-6/+6
2020-07-23defines for UART register bitsRobert Morris1-13/+21
2020-07-22fix printf() in interruptsRobert Morris3-25/+29
2020-07-20interrupt-driven uart output, hopefully a nice example for teaching.Robert Morris5-18/+100
2020-07-17cpu->scheduler -> cpu->context to reduce confusionRobert Morris2-3/+3
2020-07-17rename p->tf to p->trapframe, for consistency with p->contextRobert Morris6-30/+30
2020-07-17drop QEMUEXTRARobert Morris1-2/+2
2020-07-16make "echo hello > x" truncate file x.Robert Morris6-8/+148
2019-11-08allow more filesRobert Morris1-1/+1
2019-11-07more grindRobert Morris2-18/+145
2019-11-07Merge branch 'riscv' of g.csail.mit.edu:xv6-dev into riscvRobert Morris1-0/+2
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