From 943fd378a1324ca60da72b271769fea4a86e36cb Mon Sep 17 00:00:00 2001 From: rsc Date: Mon, 1 Oct 2007 20:43:15 +0000 Subject: Incorporate new understanding of/with Intel SMP spec. Dropped cmpxchg in favor of xchg, to match lecture notes. Use xchg to release lock, for future protection and to keep gcc from acting clever. --- TRICKS | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'TRICKS') diff --git a/TRICKS b/TRICKS index b56a38c..6883588 100644 --- a/TRICKS +++ b/TRICKS @@ -102,5 +102,11 @@ after observing the earlier writes by CPU0. So any reads in B are guaranteed to observe the effects of writes in A. -Not sure about the second one yet. +According to the Intel manual behavior spec, the +second condition requires a serialization instruction +in release, to avoid reads in A happening after giving +up lk. No Intel SMP processor in existence actually +moves reads down after writes, but the language in +the spec allows it. There is no telling whether future +processors will need it. -- cgit v1.2.3