From c9284cd93525436cc823258ab309c1b27eeec714 Mon Sep 17 00:00:00 2001
From: Mole Shang <135e2@135e2.dev>
Date: Sat, 10 Feb 2024 13:08:26 +0800
Subject: lab pgtbl: finish

---
 kernel/riscv.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'kernel/riscv.h')

diff --git a/kernel/riscv.h b/kernel/riscv.h
index 20a01db..33fa9ee 100644
--- a/kernel/riscv.h
+++ b/kernel/riscv.h
@@ -343,6 +343,7 @@ typedef uint64 *pagetable_t; // 512 PTEs
 #define PTE_W (1L << 2)
 #define PTE_X (1L << 3)
 #define PTE_U (1L << 4) // user can access
+#define PTE_A (1L << 6) // riscv access bit                      
 
 // shift a physical address to the right place for a PTE.
 #define PA2PTE(pa) ((((uint64)pa) >> 12) << 10)
-- 
cgit v1.2.3


From 48a5e34fcd07852b4a68825ce8e37feb6f6d04d7 Mon Sep 17 00:00:00 2001
From: Mole Shang <135e2@135e2.dev>
Date: Sun, 11 Feb 2024 14:41:35 +0800
Subject: lab traps: finish

---
 kernel/riscv.h | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'kernel/riscv.h')

diff --git a/kernel/riscv.h b/kernel/riscv.h
index 33fa9ee..5ede50a 100644
--- a/kernel/riscv.h
+++ b/kernel/riscv.h
@@ -327,6 +327,15 @@ sfence_vma()
   asm volatile("sfence.vma zero, zero");
 }
 
+// read the frame pointer of currently executing func
+static inline uint64
+r_fp()
+{
+  uint64 x;
+  asm volatile("mv %0, s0" : "=r" (x) );
+  return x;
+}
+
 typedef uint64 pte_t;
 typedef uint64 *pagetable_t; // 512 PTEs
 
-- 
cgit v1.2.3