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| author | Mole Shang <[email protected]> | 2024-02-11 14:44:22 +0800 |
|---|---|---|
| committer | Mole Shang <[email protected]> | 2024-02-11 16:06:15 +0800 |
| commit | 2fe04bc8faa4bf737a86c36a8017473e84814f3b (patch) | |
| tree | 2146d3dae86f21060e2e807ad364f5a949fd1c53 /kernel/riscv.h | |
| parent | 5ce1f630132d8b7b35b9dc46b4a55f860eb85d5c (diff) | |
| parent | 48a5e34fcd07852b4a68825ce8e37feb6f6d04d7 (diff) | |
| download | xv6-labs-2fe04bc8faa4bf737a86c36a8017473e84814f3b.tar.gz xv6-labs-2fe04bc8faa4bf737a86c36a8017473e84814f3b.tar.bz2 xv6-labs-2fe04bc8faa4bf737a86c36a8017473e84814f3b.zip | |
Merge branch 'traps' into cow
Conflicts:
.gitignore
Makefile
conf/lab.mk
Diffstat (limited to 'kernel/riscv.h')
| -rw-r--r-- | kernel/riscv.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/kernel/riscv.h b/kernel/riscv.h index 20a01db..5ede50a 100644 --- a/kernel/riscv.h +++ b/kernel/riscv.h @@ -327,6 +327,15 @@ sfence_vma() asm volatile("sfence.vma zero, zero"); } +// read the frame pointer of currently executing func +static inline uint64 +r_fp() +{ + uint64 x; + asm volatile("mv %0, s0" : "=r" (x) ); + return x; +} + typedef uint64 pte_t; typedef uint64 *pagetable_t; // 512 PTEs @@ -343,6 +352,7 @@ typedef uint64 *pagetable_t; // 512 PTEs #define PTE_W (1L << 2) #define PTE_X (1L << 3) #define PTE_U (1L << 4) // user can access +#define PTE_A (1L << 6) // riscv access bit // shift a physical address to the right place for a PTE. #define PA2PTE(pa) ((((uint64)pa) >> 12) << 10) |